User:Bjacob/ArithmeticTimingDifferences: Difference between revisions

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=== Handling of denormals ===
=== Handling of denormals ===


x86 CPUs have two distinct flags that can optionally be enabled to enable non-IEEE-compliant handling of denormals:
x86 CPUs have two distinct flags that can optionally be enabled to enable non-IEEE-compliant handling of denormals by SSE instructions:
* FTZ (Flush To Zero) causes any denormal ''result'' to be flushed to zero.
* FTZ (Flush To Zero) causes any denormal ''result'' to be flushed to zero.
* DAZ (Denormals Are Zero) causes any denormal ''operand'' to be handled as if it were zero.
* DAZ (Denormals Are Zero) causes any denormal ''operand'' to be handled as if it were zero.


Not all CPUs have these flags. Even CPUs with SSE2 instructions can fail to support DAZ. For example, the Pentium M has SSE2 but does not have DAZ. It is reported that some early Pentium 4 are in the same case.
 
Not all CPUs have these flags. Even CPUs with SSE2 instructions can fail to support DAZ, see below the section about that.


== x86-64 architecture ==
== x86-64 architecture ==
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